JTAG
From OpenEZX
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What is JTAG?
JTAG is a standard interface for in-system testing and debugging. It works by placing a debug macrocell in front of (almost) every Pin/Signal that enters or leaves a particular device. Those debug cells are interconnected serially, so that in the end they form one long (e.g. 600bit wide) shift register.
JTAG, the Joint Test Action Group, invented a test interface for test boards by driving and sampling pins of chips on the board. The IEEE formed a committee to modify the concept and make it an industry standard. It was approved as IEEE standard 1149.1 JTAG now refers to the standard even though the standard is different. Other JTAG - related standards are available here.
The 1149 standard requires that the chip implement all of the Boundary Scan instructions where the board test program can sample and drive all of the pins of the chip. The sampled values, drive values and control values (for bi-direction pins) are shifted in and out with a big shift register called the boundary scan chain. Two or more scanned chips can talk to each other via the pins to check for opens and shorts.
The Boundary Scan chain is just one data register DR that all chips implement. The manufacturer is free to add any other DR they want. Each new DR is selected for shifting by shifting in a manufacturer defined instruction to the instruction register IR. There is no standard for what these new instructions do. You could have an address DR and a data DR for programming on chip PROMs for instance. The AP also has very interesting DRs that can be used for debug. You have a halt instruction and you can read the current instruction and current address as DRs. You can trace several instruction in a trace buffer and dump them. The most useful DR is the breakpoint register where you can halt when an instruction reads or writes a certain address. See chapter 26 of [1]
Also, by accessing the memory bus, and manually exercising the respective chip select signals, an external entity can read/write to the system memory, and e.g. download some code into it.
Flash memory can also be programmed via JTAG, sometimes directly, sometimes indirectly (by loading a flash program into system memory first, and then running that flash program).
What do I need to use JTAG?
You need
- A JTAG Adaptor (can be built very easily for PC parallel port).
- JTAG software for your PC.
- Definition of the JTAG cells (usually BSDL). Learn a bit about Boundary Scan Description Language.
JTAG on EZX
Some EZX phones are known to have the JTAG pins wired out for the Applications Processor and the Baseband Processor. The A780 and E680/E680i have testpads that have the required signals. The a1200 and Rokr E2 phones have Debug Ports that contain the JTAG signals.
JTAG on AP
Intel has the BSDL (boundary scan definition language) files for the PXA270 publicly available on their website. They also even offer a (windows only, sources included) JTAG flash utility.
There are ports of older versions of this windows C program to Linux (jflash-linux), as well as independently developed programs.
Harald is working on getting a working JTAG configuration with his A780, stay tuned.
