EMU

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EMU (Enhanced Mini USB)

The A780 has a mini USB connector that motorola calls "Enhanced Mini USB" or in short "EMU". The Enhancement consists of several different modes that the port can be be switched into. The different modes are implemented by several analog CMOS switches and MOSFETs, which are controlled by the PCAP chip. Pin4 of the mini USB port is connected to a ADC inside the PCAP so that the voltage level on this pin can be measured by the BP, in order to identify a connected peripherial by simple resistor voltage dividers.

  • Ordinary USB client, (i.e. the phone can emulate usb storage, usb modem etc, and charge the battery from the 5 volt USB supply)
  • Charger., In this mode, the phone draws more current (up to 1,25A instead of the 500ma limit of USB host ports).
  • Car Charger,
  • Headset Interface (stereo audio out, mono mic in)
  • A Async Serial Port (3volt / 0 volt logic level)
  • A Factory Test and Flash Interface

The A780 has a mini USB connector that has some alternate pinout / functions. There is code in the kernel sources /drivers/misc/ezx-emu.c.

From my limited research on this, the A1200 seems to implement EMU via the new EOC (EMU One Chip), just to mention the translation of the EOC acronym here...

Charging modes

There are at least two different charging modes.

  • Mode 1: The battery is not completely discharged. The CPU is running and can decide which kind of USB cable is attached. Power only or also data connection. In this mode you can use charging with USB data cable and USB power supply.
  • Mode 2: The battery is completely discharged. The CPU is not running and so it could be not decided which kind of USB cable is attached. In this mode you can only use charging with USB power supply.


Normal USB device/accessory mode

Pinout :

  • 1 +5 volts input used to charge the phones battery at max 500mA.
  • 2 Data-
  • 3 Data+
  • 4 (NC/left open) voltage at adc approx 2,4-2,8 volt (there seems to be an internal pullup resistor of unknown value)
  • 5 GND

In this mode, the Data- and Data+ lines will be routed to a USB transceiver located in PCAP chip, which is connected to the AP (PXA270) via the USB2 single ended interface (GPIO pins 34,35,36,39, 40, and 53). There is a 1,5kOhm pullup resistor between the D+ as required by the USB standard to signal a high speed device (12mbits). This resistor is switchable by the PCAP bit BUSCTRL_USB_PU (+3,3volt or high Z). There is a second switchable pullup resistor on the d+ line which is used for charger detection. This resistor seems to be switched off (high Z) when setting the PCAP bit BUSCTRL_VUSB_MSTR_EN. However this does not happen instantly but with some delay (about 5-10 sec). It doesn't happen every time I tried. About 1 in 10 times it didn't work. It appears as if the firmware of the Baseband Processor is scanning from time to time the PCAP bits and then switches the resistor accordingly. I speculate therefore this resistor is connected to a GPIO on the Baseband processor and thats why there is no code in Motorolas kernel.

UART mode

Pinout :

  • 1 NC
  • 2 TXD
  • 3 RXD
  • 4 ???
  • 5 GND

The routing of the analog switches is exactly the same as in USB client mode, but inside the PCAP chip, the USB transceiver is bypassed. TXD is bypassed to GPIO 39 of the AP (which is then TXD of FFUART) and RXD is bypassed to GPIO 53 (which is then RXD of FFUART). See drivers/misc/ezx-emu.c of the original kernel for code.

Fast Charger

Pinout :

  • 1 5 volts @ 1,250 ma
  • 2 Short to pin 3
  • 3 short to pin 2
  • 4 440kohm pulldown
  • 5 GND

Just Power on the phone

Pinout :

  • 1 5 volts
  • 2 NC
  • 3 NC
  • 4 440kohm pulldown
  • 5 GND

Headset Mode

Pinout :

  • 1 The phone suppiles a voltage to the headset through this pin
  • 2 Left Out for Stereo Playback or Mono Out for handsfree
  • 3 Right Out for Stereo Playback or Mono In (mix for handsfree)
  • 4 102Kohm pulldown
  • 5 GND

Depending on what you do (play mp3 / calling) the phone will either switch to stereo mode or handsfree mode. The pins are either routed to the Stereo DAC of PCAP or to a Mono DAC and a Mono ACD in PCAP.

Factory Test

EOC Control registres

POWER_CONTROL_0

(matches atlas register 48, charger 0)

Voltage

bits 0,1,2: Sets the charge regulator output voltage

values 0 - 7:

    • 0: 4.05 V
    • 1: 4.10 V
    • 2: 4.15 V
    • 3: 4.20 V
    • 4: 4.25 V
    • 5: 4.30 V
    • 6: 3.80 V
    • 7: 4.5 V

Note: motorola firmware uses mode 4 when connected to usb and mode 7 when charger connected

Main current

bits 3,4,5,6: main charge current limit.

values 0 - 15: (min, nom, max)

    • 0: 0, 0, 0 mA
    • 1: 55, 70, 85 mA
    • 2: 161, 177, 195 mA
    • 3: 242, 266, 293 mA
    • 4: 322, 355, 390 mA
    • 5: 403, 443, 488 mA
    • 6: 484, 532, 585 mA
    • 7: 564, 621, 683 mA
    • 8: 645, 709, 780 mA
    • 9: 725, 798, 878 mA
    • 10: 806, 886, 975 mA
    • 11: 886, 975, 1073 mA
    • 12: 967, 1064, 1170 mA
    • 13: 1048, 1152, 1268 mA
    • 14: 1450, 1596, 1755 mA
    • 15: Fully On—Disallow battery FET to be turned on in hardware

Note: morola firmware uses mode 4 when connected to usb and mode 13 when connected to charger

Trickle current

bits 7,8,9: trickle current. should not be enabled at the same tame as main current.

values 0 - 7:

    • 0: 0 mA
    • 1: 9 mA
    • 2: 20 mA
    • 3: 36 mA
    • 4: 42 mA
    • 5: 50 mA
    • 6: 59 mA
    • 7: 68 mA

Power path

  • bit 10: FETOVRD
    • 0 = BATTFET and BPFET outputs are controlled by hardware
    • 1 = BATTFET and BPFET are controlled by the state of the FETCTRL bit
  • bit 11: FETCTRL
    • 0 = BPFET is driven low, BATTFET is driven high if FETOVRD is set
    • 1 = BPFET is driven high, BATTFET is driven low if FETOVRD is set

Other

  • bit 12: Reserved
  • bit 13: RVRSMODE Reverse mode enable
    • 0 = Reverse mode disabled
    • 1 = Reverse mode enabled
  • bit 14: Reserved
  • bit 15-16: OVCTRL Overvoltage threshold select
    • 0 = 5.83 V (Should not be used in separate input configurations, this will disable the overvoltage setting)
    • 1 = 6.90 V
    • 2 = 9.80 V
    • 3 = 19.6 V
  • bit 17: UCHEN Unregulated charge enable
    • 0: Disable
    • 1: Enable
  • bit 18: CHRGLEDEN CHRGLED enable
    • 0: Disable
    • 1: Enable
  • bit 19: CHRGRAWPDEN Enables a 5K pull down at CHRGRAW
    • 0: The 5K pull down at CHRGRAW disabled
    • 1: The 5K pull down at CHRGRAW enabled. To be used in the dual path charging configuration


POWER_CONTROL_1

(matches atlas register 50, charger USB 1)

  • bit 0-1: VUSBIN VUSB regulator input source control Controls the input source for the VUSB regulator. The default input is BP.
    • 0: input = Boost via VINBUS, default in boot mode
    • 1: input = VBUS
    • 2: input = BP (VINVIB), default in non boot modes
    • 3: input = VBUS
  • bit 2: VUSB output voltage setting
    • 0: VUSB output voltage set to 3.2 V
    • 1: VUSB output voltage set to 3.3 V
  • bit 3: VUSBEN VUSB enable
    • 0: VUSB output is disabled (unless USBEN pin is asserted high)
    • 1: VUSB output is enabled (regardless of USBEN pin)
  • bit 4: Reserved
  • bit 5: VBUSEN VBUS enable
    • 0: VBUS output is disabled (unless VBUSPULSETMR[2:0] <> 0)
    • 1: VBUS output is enabled (regardless of VBUSPULSETMR[2:0])
  • bit 6: RSPOL Swaps TX and RX in RS232 mode
    • 0: RS232 TX on UDM, RX on UDP
    • 1: RS232 TX on UDP, RX on UDM
  • bit 7: RSTRI Tristates TX in RS232 mode
    • 0: No effect
    • 1: TX forced to Tristate in RS232 mode only
  • bit 8: ID100KPU Switches in 100K UID pull-up
    • 0: 100K UID pull up resistor not switched in
    • 1: 100K UID pull up resistor switched in

ISR/MSR/SENSE

  • bit 0: VBUS_3V4 VBUS > 3.4 volts
  • bit 1: VBUSDET VBUS voltage changed
  • bit 2: VBUSOV VBUS overvoltage
  • bit 3: RVRS_CHRG Reverse charge
  • bit 4-5: ID_FLOAT ID transition (ID float bit) (bit 4 is valid on ISR/MSR, bit 4-5 valid on SENSE)
    • 0 = no usb accessory is attached
    • 1 = A type plug is attached indicating a USBOTG default slave
    • 2 = B type plug is attached indicating a USB Host, a USB OTG default master, or no device
    • 3 = factory mode
  • bit 6: SE1_DET: single-ended 1 detect
  • bit 7: CC_CV: charger mode transition
  • bit 8: CHRG_CURR charger current below 20mA
  • bit 9: RVRS_MODE Reverse current limit exceeded
  • bit 10: CK_DET Carkit detect
  • bit 11: BATTPON Battery Voltage > or < 3.4 volts

CONN_CONTROL

(matches ATLAS register 49, USB0)

Connectivity Control register

  • bit 0: FSENB USB full speed mode select bar
    • 0: USB full speed mode selected
    • 1: USB low speed mode selected
  • bit 1: USBSUSPEND USB suspend mode enable
    • 0: USB Suspend mode disabled
    • 1: USB Suspend mode enabled
  • bit 2: USBPU Switches in variable 1.5K UDP/UDM pull-up
    • 0: Variable 1.5K pull-up switched out
    • 1: Variable 1.5K pull-up switched in
  • bit 3: UDPPD Switches in 15K UDP pull-down
    • 0: 15K UDP pull-down switched out
    • 1: 15K UDP pull-down switched in
  • bit 4: UDMPD Switches in 15K UDM pull-down
    • 0: 15K UDM pull-down switched out
    • 1: 15K UDM pull-down switched in
  • bit 5: DP150KPU Switches in 150K UDP pull-up
    • 0: 150K UDP pull-up switched out
    • 1: 150K UDP pull-up switched in
  • bit 6: VBUS70KPDENB Turns off VBUS pull-down NMOS switch
    • 0: VBUS pull-down NMOS switch is ON if VBUSEN=0, OFF otherwise
    • 1: VBUS pull-down NMOS switch is OFF
  • bit 7-9: VBUSPULSETMR VBUS regulator current limit control
    • 0: current limit set to 200 mA
    • 1: current limit set to 910 uA for 10 msec
    • 2: current limit set to 910 uA for 20 msec
    • 3: current limit set to 910 uA for 30 msec
    • 4: current limit set to 910 uA for 40 msec
    • 5: current limit set to 910 uA for 50 msec
    • 6: current limit set to 910 uA for 60 msec
    • 7: current limit set to 910 uA

The 1 to 5 settings are self clearing at end of timer

  • bit 10: DLPSRP DLP Timer enable
    • 0: DLP Timer disabled
    • 1: DLP Timer enabled, self clearing at end of pulse
  • bit 11: SE0CONN SE0 automatically connects UDP pull-up
    • 0: variable UDP pull-up is not automatically connected when SE0 is detected
    • 1: variable UDP pull-up is automatically connected when SE0 is detected
  • bit 12: USBXCVREN USB transceiver enable
    • 0: USB transceiver disabled if USBEN is low or if USBCNTRL = 0
    • 1: USB transceiver enabled if CONMODE[2:0] = 000 and RESETB is high
  • bit 13: PULLOVR Variable pull-up / pull-downs disconnect
    • 0: variable 1k5 pull-up and UDP/UDM pull-downs are connected when UTXENB is active low
    • 1: variable 1k5 pull-up and UDP/UDM pull-downs are disconnected when UTXENB is active low
  • bit 14-16: CONMODE Connectivity Interface mode select
    • 0: USB mode
    • 1: RS232 mode 1
    • 2: RS232 mode 2
    • 3: reserved
    • 4: mono audio mode
    • 5: stereo audio mode
    • 6: Test mode right mode
    • 7: Test mode left mode
  • bit 17: DATSE0 USB single ended / differential mode
    • 0: Differential USB mode
    • 1: Single ended USB mode
  • bit 18: BIDIR USB unidirectional / bidirectional transmission
    • 0: unidirectional USB transmission
    • 1: bidirectional USB transmission
  • bit 19: USBCNTRL USB transceiver and pull-up control
    • 0: USB mode of operation controlled by SPI
    • 1: USB mode of operation controlled by USBEN pin
  • bit 20: IDPD Switches in UID pull-down
    • 0: UID pull-down switched out
    • 1: UID pull-down switched in
  • bit 21: IDPULSE Pulses UID to ground
    • 0: UID line not pulsed
    • 1: pulse to gnd on the UID line generated. This bit is a self clearing bit and will always read back 0
  • bit 22: IDPUCNTRL UID pin pull up source select
    • 0: UID pin pulled high through 220K resistor
    • 1: UID pin pulled high by 5uA current source
  • bit 23: DMPULSE Generates positive pulse on the UDM line
    • 0: UDM line not pulsed
    • 1: A positive pulse on the UDM line is generated. This bit is a self clearing bit and will always read back 0
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